Circuit configuration for protecting an integrated circuit

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means

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361 58, 361 91, 361111, 357 2313, H02H 904

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049492128

ABSTRACT:
A circuit configuration for protecting an integrated circuit from damage by a voltage present at an output exceeding the supply voltage range of the integrated circuit includes a given number of parasitic circuit structures of the integrated circuit. Additional circuit structures combined with the parasitic circuit structures form a protective circuit. The circuit structures are activated by the voltage at the output to become operative for protection.

REFERENCES:
patent: 4775912 (1988-10-01), Menniti et al.
German brochure: Thomas M. Frederiksen, "Schwierigkeiten und ihre Behebung beim Anwenden integrierter Operationsuerstarker", Elektronike, No. 6/1985, pp. 42-63; p. 43 pertinent.

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