Circuit configuration for phase difference measurement

Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – Frequency of cyclic current or voltage

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324 7655, 324 7661, 324 7677, 324 7682, 326 16, 327 7, 327 12, G01R25/08

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active

059031441

ABSTRACT:
A circuit configuration for measuring a phase difference between a reference signal and a clock signal includes a first shift register being clocked by the clock signal and having an input receiving the reference signal. A digital differentiator is connected downstream of the first shift register and has an output. A counter has an input receiving the clock signal and an output outputting a multidigit binary word. A buffer memory is connected to the counter and to the digital differentiator for storing the binary word at the output of the counter in memory upon an appearance of a corresponding output signal of the digital differentiator. The buffer memory has an output forming most significant bits of an output binary word. A second shift register is inversely clocked by the clock signal and has an input receiving the reference signal and an output. An analog differentiator has an input connected to the output of the digital differentiator and an output. A D flip-flop has a data input connected to the output of the second shift register and a clock input connected to the output of the analog differentiator for supplying an output signal forming a least significant bit of the output binary word.

REFERENCES:
patent: 4644268 (1987-02-01), Malka et al.
patent: 4926115 (1990-05-01), Tarleton et al.
Electronic Circuits--Design and Applications Publ.1991 (Tietze et al.), pp. 869-870 (month unavailable).

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