Circuit configuration for level boosting, in particular for...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C327S525000

Reexamination Certificate

active

06856186

ABSTRACT:
A circuit configuration is provided for level boosting, in particular for driving a link that can be programmed by an energy pulse, which is also referred to as a fuse. The circuit configuration has a circuit for level boosting and also a logic circuit. The logic circuit combines a first input signal with a second input signal and controls an input of the circuit for level boosting, the output level of an output signal of the circuit for level boosting being greater than the input level. A fusible link can be connected to an output terminal of the circuit for level boosting. Since an input stage of the circuit for level boosting is at the same time a first subcircuit of the logic circuit, the circuit configuration enables an exceptional component and area-saving construction. This has an advantageous effect particularly in mass memory chips.

REFERENCES:
patent: 5245576 (1993-09-01), Foss et al.
patent: 5293561 (1994-03-01), Nizaka
patent: 5313424 (1994-05-01), Adams et al.
patent: 5448187 (1995-09-01), Kowalski
patent: 5583456 (1996-12-01), Kimura
patent: 5696728 (1997-12-01), Yu et al.
patent: 5777491 (1998-07-01), Hwang et al.
patent: 5821800 (1998-10-01), Le et al.
patent: 5844298 (1998-12-01), Smith et al.
patent: 5920205 (1999-07-01), Bushehri et al.
patent: 5986951 (1999-11-01), Park et al.
patent: 6222384 (2001-04-01), Kim
patent: 693 01 225 (1994-05-01), None
patent: 198 25 034 (1999-04-01), None
patent: 0 388 074 (1990-09-01), None
patent: 0 798 860 (1997-10-01), None
patent: 60018018 (1985-01-01), None
patent: 62081185 (1987-04-01), None
patent: 02128514 (1990-05-01), None
patent: 02180426 (1990-07-01), None
patent: 04145720 (1992-05-01), None
patent: 05308274 (1993-11-01), None
patent: 08046508 (1996-02-01), None
patent: 11195974 (1999-07-01), None
patent: 9835444 (1998-08-01), None
Joo-Sun Choi et al.: “Antifuse EPROM Circuit for Field Programmable DRAM”,2000 IEEE International Solid-State Circuits Conference, pp. 406-407.
Jae-Kyung Wee et al.: “An Antifuse EPROM Circuitry Scheme for Field-Programmable Repair in DRAM”,IEEE Journal of Solid-State Circuits, vol. 35, No. 10, Oct. 2000, pp. 1408-1414.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Circuit configuration for level boosting, in particular for... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Circuit configuration for level boosting, in particular for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit configuration for level boosting, in particular for... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3471638

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.