Circuit configuration for increasing the output voltage of an el

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307482, H03K 19096, H03K 1760

Patent

active

050480162

ABSTRACT:
A circuit configuration includes a first electronic reversing switch having an output being superimposed on a first operating potential during a first switching phase and on a second operating potential during a second switching phase, as well as a second electronic reversing switch having an output being superimposed on the first operating potential during the first switching phase and on a node point during the second switching phase. A diode is connected in the conducting direction between the second operating potential and the node point. A capacitor is connected between the output of the first electronic reversing switch and the node point.

REFERENCES:
patent: 4468576 (1984-08-01), Takemae
patent: 4542310 (1985-09-01), Ellis et al.
patent: 4628218 (1986-12-01), Nakaizumi
patent: 4638182 (1987-01-01), McAdams
patent: 4644190 (1987-02-01), Eberhard et al.
IBM Technical Disclosure Bulletin, vol. 18, No. 3, Aug. 1975; pp. 910-911, New York, U.S.: M. E. Homan: "FET Depletion Load Push-Pull Logical Circuit"; p. 910, line 11-p. 911, line 10; Figure.

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