Electrical pulse counters – pulse dividers – or shift registers: c – Applications – Measuring or testing
Reexamination Certificate
2005-01-04
2005-01-04
Wambach, Margaret R. (Department: 2816)
Electrical pulse counters, pulse dividers, or shift registers: c
Applications
Measuring or testing
C377S026000, C377S054000, C714S700000, C714S731000, C714S744000
Reexamination Certificate
active
06839397
ABSTRACT:
A circuit configuration for generating control signals for testing high-frequency synchronous digital circuits, especially memory chips, is described. A p-stage shift register which is clocked at a clock frequency corresponding to the high clock frequency of the digital circuit to be tested has connected to its parallel loading inputs p logical gates which logically combine a static control word with a dynamic n-position test word. The combined logical value is loaded into the shift register at a low-frequency loading clock rate so that a control signal, the value of which depends on the information loaded into the shift register in each clock cycle of the clock frequency of the latter is generated at the serial output of the shift register.
REFERENCES:
patent: 5504756 (1996-04-01), Kim et al.
patent: 5651014 (1997-07-01), Kobayashi
patent: 05264667 (1993-10-01), None
Ernst Wolfgang
Krause Gunnar
Kuhn Justus
Lüpke Jens
Müller Jochen
Infineon - Technologies AG
Mayback Gregory L.
Wambach Margaret R.
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