Circuit configuration for generating a boosted output voltage

Details Circuit configuration for generating a boosted output voltage Circuit configuration for generating a boosted output voltage

1997-12-12

1999-05-18

Cunningham, Terry D.

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Signal transmission integrity or spurious noise override

327537, H03K17/16

Patent

active

059054000

ABSTRACT:
A circuit configuration for generating an output voltage which is boosted beyond a supply voltage includes a boosting capacitor that is connected through a p-channel MOS transistor to an output node. A control circuit ensures that first of all the boosting capacitor and the output node are precharged through the use of respective precharging transistors when the p-channel MOS transistor is turned on, and that subsequently, during a shifting phase, the gate terminal of the p-channel MOS transistor is held at a floating potential. This prevents the voltage present between the gate and the main current path terminals of the p-channel MOS transistor from becoming greater than the supply voltage.

REFERENCES:
patent: 5184030 (1993-02-01), Chung
patent: 5216290 (1993-06-01), Childers
patent: 5677645 (1997-10-01), Merritt
patent: 5703827 (1997-12-01), Leung
patent: 5805509 (1998-09-01), Leung
patent: 5831470 (1998-11-01), Park

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