Circuit configuration for an integratable and controllable ring

Details Circuit configuration for an integratable and controllable ring Circuit configuration for an integratable and controllable ring

1990-09-05

1991-08-06

Grimm, Siegfried H.

Oscillators

Ring oscillators

331108B, 331111, 331177R, H03B 524

Patent

active

050381180

ABSTRACT:
A circuit configuration of an integratable and controllable ring oscillator for generating a clock signal includes first and second stages being connected between supply terminals and having input and output terminals. The output terminal of the first stage is connected to the input terminal of the second stage. An inverter is connected between the output terminal of the second stage and the input terminal of the first stage. The input terminal of the second stage supplies a clock signal. Each of the stages includes first and second transistors having load paths connected between the supply terminals in a series circuit with a connecting point between the transistors. The second transistor has a gate terminal connected to the input terminal. The first transistor determines the frequency of the clock signal, is controllable in accordance with a control variable and acts as a current source. A capacitor has one terminal connected to the connecting point and another terminal connected to a fixed potential. A decoupling stage is connected between the output terminal and the connecting point.

REFERENCES:
patent: 3708757 (1973-01-01), Savarese et al.
patent: 4910471 (1990-03-01), Brahmbhatt et al.
Electronic Letters, Jun. 5, 1986, vol. 22, No. 12, pp. 677 to 679, Syed et al., "Gigahertz Voltage-Controlled Ring Oscillator".
German Publication: Semiconductor Circuitry, Tietze and Schenk, 5th Ed., 1980, pp. 701-703.
Wireless World, Dec. 1971, "Linear Ramp Generator", J. B. F. Cairns, pp. 604-605.

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