Circuit configuration for an amplifier stage

Details Circuit configuration for an amplifier stage Circuit configuration for an amplifier stage

1990-02-21

1991-11-12

Mullins, James B.

Amplifiers

With semiconductor amplifying device

Including field effect transistor

330300, 358184, H03F 316

Patent

active

050651145

ABSTRACT:
A circuit configuration for an amplifier stage includes an input terminal for receiving an input signal, an output terminal to be connected to a capacitive load, a supply voltage terminal for connection to a direct voltage and at least one reference potential terminal to be connected to the capacitive load. An amplifier quadrupole for amplifying the input signal has a first output lead, a first input lead connected to the input terminal, a second input lead connected to the at least one reference potential terminal, and a second output lead connected to the at least one reference potential terminal. At least one self-conducting FET for accelerated charging of the capacitive load has a gate lead connected to the first output terminal, a drain lead connected to the supply voltage terminal, and a source lead connected to the output terminal. At least one ohmic resistor is connected between the first output lead and the supply voltage terminal. At least one other ohmic resistor is connected between the gate lead and the source lead of the at least one self-conducting FET.

REFERENCES:
patent: 4093925 (1978-06-01), Yokoyama
Clifton, "MOSFETs Part 2-Circuits You Can Build and Use", Radio-Electronics, Dec. 1969, pp. 61-63, 68.

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