Circuit configuration for accelerated charge reversal of the vol

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

307453, 307475, 307241, 307246, H03K 1716, H03K 19003

Patent

active

050049372

ABSTRACT:
A circuit configuration includes data transmitters, data receivers and a bus line of an integrated circuit being divided into N line segments. Each of the line segments is connected to a respective one of the data transmitters and to a respective one of the data receivers for data transmission between the data transmitters and the data receivers. The bus line is charged to a predetermined electrical voltage level during a pre-charging phase, and the bus line has a voltage level being left as is or reversed within a charge reversal period during a data transmission phase in accordance with digital data to be transmitted. A trigger circuit is connected to the bus line for accelerated charge reversal of the bus line. The trigger circuit effects an additional, accelerated discharging or charging of the bus line upon attainment of a predetermined trigger level. The trigger circuit includes a logic gate having a plurality of inputs and an output. Switch elements are each connected between a respective one of the N line segments of the bus line and a respective one of the inputs of the logic gate for comparing the trigger level with a voltage level at that time. The switch elements and the logic gate may be replaced by a NAND element having N inputs. Discharge transistors are connected to and triggered by the output of the logic gate for rapid individual charge reversal of each of the line segments.

REFERENCES:
patent: 3774053 (1973-11-01), Carlson
patent: 4486753 (1984-12-01), Saeki et al.
patent: 4488066 (1984-12-01), Shoji
patent: 4498021 (1985-02-01), Uya
patent: 4621202 (1986-11-01), Pumo
patent: 4707623 (1987-11-01), Bismarck

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Circuit configuration for accelerated charge reversal of the vol does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Circuit configuration for accelerated charge reversal of the vol, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit configuration for accelerated charge reversal of the vol will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-328415

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.