Circuit configuration and method for assessing capacitances...

Details Circuit configuration and method for assessing capacitances... Circuit configuration and method for assessing capacitances...

2005-03-22

2005-03-22

Le, N. (Department: 2858)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

For fault location

C324S678000, C324S683000

Reexamination Certificate

active

06870373

ABSTRACT:
A circuit configuration for assessing capacitances in a matrix, which has a number of rows with at least one capacitance in at least one dimension, includes a test arm connected to first electrodes of each of the capacitances to be assessed and by which two different potentials can be applied to the first electrodes, a measurement arm connected to second electrodes of each of the capacitances to be assessed and that has a first measurement path and a second measurement path connected to a common potential. The first measurement path has an instrument for assessing the capacitances and the first and second measurement paths can be connected to the second electrodes. The circuit configuration has a drive device that connects each of the capacitances to be assessed individually to the two different potentials.

REFERENCES:
patent: 4728932 (1988-03-01), Atherton
patent: 25 29 475 (1977-01-01), None
patent: 42 37 196 (1994-02-01), None
patent: 198 33 210 (2000-02-01), None
patent: 0 889 521 (1999-01-01), None
Chen, C. J. et al.: “An On-Chip, Interconnect Capacitance Characterization Method with Sub-Femto-Farad Resolution”, IEEE, vol. 11, No. 2, May 1998.
Chen, J. C. et al.: “An On-Chip, Interconnect Capacitance Characterization Method with Sub-Femto-Resolution”, IEEE, vol. 10, Mar. 1997.
McGaughy, B. W. et al.: “A Simple Method for On-Chip, Sub-Femto Farad Interconnect Capacitance Measurement”, IEEE, vol. 18, No. 1, Jan. 1997, pp. 21-23.
Chen, J. C. et al.: “An On-Chip, Attofarad Interconnect Charge-Based Capacitance Measurement (CBCM) Technique”, IEEE, 1996, pp. 3.4.1-3.4.4.

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