Circuit compensating nonlinearities

Details Circuit compensating nonlinearities Circuit compensating nonlinearities

1997-09-08

1999-08-17

Wells, Kenneth B.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Converting input voltage to output current or vice versa

327 65, 327359, H02M 1100

Patent

active

059399066

ABSTRACT:
In a circuit (200), a differential pair (217/227) of transistors (210 and 220) receives a differential input signal (X.sub.1 -X.sub.2) from input terminals (211 and 221) and provides a differential output signal (Y.sub.1 -Y.sub.2) to output lines (215 and 225). The differential pair (217/227) is powered from a common constant current source (290) at a common node (205). Nonlinearities, such as cubic terms in a transfer function H=(Y.sub.1 -Y.sub.2)/(X.sub.1 -X.sub.2) caused by the transistors are compensated by compensation circuits (237 and 247). The compensation circuits (237 and 247) are coupled between the node (205) and the output lines (215 and 225). The compensation circuits (237 and 247) are controlled by the input signal (X.sub.1 -X.sub.2) and drain current from the node (205). Thereby, the currents going into the transistors (210 and 220) and the transistors gains (Y.sub.1 /X.sub.1 and Y.sub.2 /X.sub.2) are modified, so that nonlinearities are substantially canceled.

REFERENCES:
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Babanezhad, J. N., Temes G. C.: "A 20 V four quadrant CMOS analog multiplier", IEEE Journal of Solid State Circuits, vol. SC-20, pp. 1158-1168, Dec. 1985.
Ismail, M., Fiez, T.: "Analog VLSI Signal and Information Processing", chapter 3.3, McGraw-Hill, 1994, ISBN 0-07-032386-0; pp. 63-72.
Franca, J. E.: "Design of Analog-Digital VLSI Circuits for Telecommunications and Signal Processing", chapter 3.5 (pp. 81-96), Second Edition, Prentice Hall, Englewood Cliffs, 1994, ISBN 0-13-203639-8.
Silva-Martinez, J.: "High-Performance CMOS Continuous-Time Filters", Kluwer Academic Publishers, 1993, ISBN 0-7923-9339-2, chapter 2, pp. 15-66.

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