Circuit board with wiring sealing filled holes

Stock material or miscellaneous articles – Structurally defined web or sheet – Discontinuous or differential coating – impregnation or bond

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Details

428210, 174255, 174257, 174262, 430 14, B32B 1500

Patent

active

061270253

ABSTRACT:
Circuit boards are manufactured by forming a substrate with a dielectric surface, laminating a metal foil and a peelable film to the substrate, and forming holes in the substrate through the peelable film and foil. A filler material with an organic base may be filled with electroconductive particles or dielectric thermoconductive particles. The filler material is deposited onto a sacrificial carrier and the filler material is heated to at least partially cure it. The filler material is laminated onto the peelable film with sufficient heat and pressure to force the filler material to fill the holes. For thermoconductive filler the holes are filled sufficient for electrical connection through the holes. The peelable layer, sacrificial carrier and filler material remaining therebetween are peeled off the copper foil. The filler material is abraded to the level of the foil and is then copper plated. The copper is patterned to form a wiring layer. A permanent dielectric photoresist layer is formed over the wiring layer and via holes are formed through the photoimagable dielectric over pads and conductors of the wiring layer. Holes are formed through the substrate and the photoimagable dielectric, walls of the via holes, and walls of the through holes are copper plated. The copper plating on the photoimagable dielectric is patterned to form an exterior wiring layer which is covered by solder resist with windows over lands around the through holes and surface mount connection pads of the exterior wiring layer to form a high density circuitized substrate. Surface mount components and/or pin in hole components are attached to the circuitized substrate with solder joints between terminals of the components and the lands and/or connection pads to form a high density circuit board assembly. One or more of the circuit board assemblies are mounted in an enclosure with a power supply, CPU, RAM, and I/O means to form an improved information handling system with increased performance due to shorter signal flight times due to the high component density.

REFERENCES:
patent: 3163588 (1964-12-01), Shortt et al.
patent: 3387365 (1968-06-01), Stelmak
patent: 4127699 (1978-11-01), Aumiller et al.
patent: 4135988 (1979-01-01), Dugan et al.
patent: 4210704 (1980-07-01), Chandross et al.
patent: 4221047 (1980-09-01), Narken et al.
patent: 4354895 (1982-10-01), Ellis
patent: 4590539 (1986-05-01), Sanjana et al.
patent: 4618567 (1986-10-01), Sullivan
patent: 4727649 (1988-03-01), Nishizawa
patent: 4731503 (1988-03-01), Kitanishi
patent: 4747968 (1988-05-01), Gilleo
patent: 4791248 (1988-12-01), Oldenettel
patent: 4822523 (1989-04-01), Prud'Homme
patent: 4880570 (1989-11-01), Sanborn et al.
patent: 4882245 (1989-11-01), Gelorme et al.
patent: 4882839 (1989-11-01), Okada
patent: 4893404 (1990-01-01), Shirahata et al.
patent: 4904414 (1990-02-01), Peltz et al.
patent: 4927983 (1990-05-01), Jones et al.
patent: 4940651 (1990-07-01), Brown et al.
patent: 4955132 (1990-09-01), Ozawa
patent: 4964948 (1990-10-01), Reed
patent: 4967314 (1990-10-01), Higgins, III
patent: 4991060 (1991-02-01), Kawakami et al.
patent: 4999136 (1991-03-01), Su et al.
patent: 5026624 (1991-06-01), Day et al.
patent: 5028743 (1991-07-01), Kawakami et al.
patent: 5057372 (1991-10-01), Imfeld et al.
patent: 5065227 (1991-11-01), Frankeny et al.
patent: 5070002 (1991-12-01), Leech et al.
patent: 5082595 (1992-01-01), Glackin
patent: 5117069 (1992-05-01), Higgins, III
patent: 5118458 (1992-06-01), Nishihara et al.
patent: 5200026 (1993-04-01), Okabe
patent: 5210941 (1993-05-01), Turek et al.
patent: 5220135 (1993-06-01), Kawakami et al.
patent: 5220724 (1993-06-01), Gerstner
patent: 5243142 (1993-09-01), Ishikawa et al.
patent: 5260170 (1993-11-01), Brown
patent: 5262247 (1993-11-01), Kajiwara et al.
patent: 5266446 (1993-11-01), Chang et al.
patent: 5271150 (1993-12-01), Inasaka
patent: 5300402 (1994-04-01), Card, Jr. et al.
patent: 5304252 (1994-04-01), Condra et al.
patent: 5319159 (1994-06-01), Watanabe et al.
patent: 5346750 (1994-09-01), Hatakeyama et al.
patent: 5348574 (1994-09-01), Tokas et al.
patent: 5366027 (1994-11-01), Turek et al.
patent: 5373629 (1994-12-01), Hupe et al.
patent: 5384952 (1995-01-01), Matsui
patent: 5427895 (1995-06-01), Magnuson et al.
patent: 5439779 (1995-08-01), Day et al.
patent: 5451721 (1995-09-01), Tsukada et al.
patent: 5463190 (1995-10-01), Carson et al.
patent: 5473120 (1995-12-01), Ito et al.
patent: 5487218 (1996-01-01), Bhatt et al.
patent: 5489750 (1996-02-01), Sakemi et al.
patent: 5494764 (1996-02-01), Hyodo
patent: 5531020 (1996-07-01), Durand et al.
patent: 5541567 (1996-07-01), Fogel
patent: 5557844 (1996-09-01), Bhatt et al.
patent: 5566840 (1996-10-01), Waldner et al.
patent: 5590462 (1997-01-01), Hundt et al.
patent: 5611140 (1997-03-01), Kuleszas et al.
patent: 5615477 (1997-04-01), Sweitzer
patent: 5822856 (1998-10-01), Bhatt et al.
patent: 5958600 (1999-09-01), Sotokawa et al.
Glenda Derman, "New Avenue for Microvias", Electronic Engineering Times, Mar. 18, 1996, p. 68.
Photoimagable Dielectrics--from ITIRC, Electronic Engineering Times, Mar. 18, 1996, p. 68.
IBM Invention Disclosure "Compositions and Method for Filling Vias Free from Bleed Out" by Bhastt et al (no date).
McGraw Hill, "Principles of Electronic Packaging" by Seraphim et al., pp. 609-910, 1989. (no month).
IBM Technical Disclosure Bulletin vol. 24 No. 2, Jul. 1981.
IBM Technical Disclosure Bulletin vol. 10, No. 5, Oct. 1967 Printed Circuit Base by J.H. Marshall.
IBM Technical Disclosure Bulletin vol. 11, No. 7, Dec. 1968 "Face Protection of Printed Circuit Boards" by C.J. McDermott.

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