Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Insulative housing or support
Reexamination Certificate
2006-06-28
2008-03-11
Nguyen, Dao H. (Department: 2818)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Insulative housing or support
C438S123000, C438S209000, C438S671000, C257S686000, C257SE21511, C257SE21705, C257SE25011
Reexamination Certificate
active
07341890
ABSTRACT:
A circuit board with an built-in electronic component according to the present invention includes an insulating layer, a first wiring pattern provided on a first main surface of the insulating layer, a second wiring pattern provided on a second main surface different from the first main surface of the insulating layer, and an electronic component such as a semiconductor chip or the like provided in an internal portion of the insulating layer. The electronic component includes a first external connection terminal formed on a first surface and a second external connection terminal formed on a second surface different from the first surface. The first external connection terminal is connected electrically to the first wiring pattern, and the second external connection terminal is connected electrically to the second wiring pattern.
REFERENCES:
patent: 6239496 (2001-05-01), Asada
patent: 6329045 (2001-12-01), Hirano et al.
patent: 6784530 (2004-08-01), Sugaya et al.
patent: 2001-332866 (2001-11-01), None
Asahi Toshiyuki
Ishimaru Yukihiro
Nishiyama Tousaku
Sugaya Yasuhiro
Hamre Schumann Mueller & Larson P.C.
Matsushita Industrial Co., Ltd.
Nguyen Dao H.
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