Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2000-12-22
2003-08-05
Zarabian, Amir (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S295000, C257S778000
Reexamination Certificate
active
06603202
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a circuit board and a semiconductor device using such a circuit board as well as a production process of the same. The present invention also relates to a circuit board-providing article useful in the production of the circuit board of the present invention.
2. Description of the Related Art
In recent years, there has been a tendency that semiconductor chips are mounted with a high density, and a high integration degree, on a circuit board to form a semiconductor device. Typical examples of such semiconductor devices, which are practically used, include a PGA, i.e., Pin Grid Array, and a BGA, i.e., Ball Grid Array.
Further, in the circuit board having mounted thereon semiconductor chips, to reduce a noise generated during operation of the semiconductor device, it is conventionally carried out to provide one or more chip capacitors as an outer constitutional part on a surface of the circuit board. However, since the chip capacitor(s) have to be mounted on a surface of the circuit board, the semiconductor device suffers from the problem that the noise cannot be satisfactory absorbed because of the distance between the semiconductor chips and the capacitor(s). In addition, there is also a problem that the circuit board is large and thus a semiconductor device has to be produced as a result of the outer mounting of the capacitor(s).
Recently, to avoid the above problems, it has been suggested to incorporate capacitor(s) in the interior of the circuit board. For example, Japanese Unexamined Patent Publication (Kokai) No. 10-93246 teaches a multilayered wiring board comprising a capacitor sandwiched between the wiring layers of the board to reduce the number of the elements or parts to be packaged in the board to thereby enable high density formation of the wiring along with reduction in size of the finally produced semiconductor devices. More particularly, the multilayered wiring board of JPP′ 246, as illustrated in
FIG. 1
, has a multilayered wiring section
102
, and the multilayered wiring section
102
has alternately disposed thin film wiring conductors
104
a
and
104
b
and others (not shown) which are electrically connected with each other through a through-hole conductor
109
(partly shown) formed in insulating layers
103
a
,
103
b
and
103
c
made of an organic resin. At least one layer of the organic insulating layers, i.e., layer
103
b
contains dielectric fillers having a dielectric constant of not less than 20 to form a high dielectric organic insulating layer. Thus, a capacitor is formed by the layer
103
b
and its lower wiring conductor
104
a
and upper wiring conductor
104
b
. Further, the upper wiring conductor
104
b
is laminated through a nickel layer
110
to an upper surface of the layer
103
b
to provide good bonding between these layers. Furthermore, the lower wiring conductor
104
a
has a surface roughness of 0.05 &mgr;m≦(Ra)≦5 &mgr;m to also provide good bonding between this layer and the layer
103
b
. According to this multilayered wiring board, since a specific capacitor part is not required to be packaged in the board, it becomes possible to reduce the number of the parts to be included in the board.
However, the prior art circuit boards including the multiwired wiring board of Japanese Kokai 10-93246 cannot fully solve the above problems. That is, it is still desired to provide a noise-free and small sized circuit board provided with capacitor(s) for use in the production of semiconductor devices.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a circuit board capable of reducing its size, along with having a high absorption efficiency of noise.
It is another object of the present invention to provide a process for the production of the improved circuit board of the present invention.
It is still another object of the present invention to provide a semiconductor device using the improved circuit board of the present invention.
Further, it is still another object of the present invention to provide a process for the production of the semiconductor device of the present invention.
Furthermore, it is still another object of the present invention to provide a circuit board-providing article suitable in the production of the improved circuit board of the present invention.
These and other objects of the present invention will be easily understood from the following detailed description of the preferred embodiments of the present invention.
The inventors of the present invention have conducted intensive studies to accomplish the objects described above, and have discovered an improved circuit board and semiconductor device using the same.
According to one aspect of the present invention, there is provided a circuit board-providing article for use in the production of a circuit board having provided thereon by-pass capacitor(s), said article comprising a metallic foil having laminated to one surface thereof a layer of the ferroelectric material.
According to another aspect of the present invention, there is provided a circuit board for use in the production of semiconductor devices, in which said circuit board comprises two or more by-pass capacitors formed thereon, and each said by-pass capacitor is constituted from a first electrode layer formed in the uppermost layer of the circuit board, a ferroelectric layer formed, from a ferroelectric material having a higher dielectric constant than said upper electrode layer, over the first electrode layer, and a second electrode layer formed over the ferroelectric layer, and is designed to be electrically contacted with a power source or grounding terminal of a semiconductor element.
According to still another aspect of the present invention, there is provided a process for the production of a circuit board in which said circuit board comprises two or more by-pass capacitors formed thereon, and each said by-pass capacitor is constituted from a first electrode layer formed in the uppermost layer of the circuit board, a ferroelectric layer formed, from a ferroelectric material having a higher dielectric constant than said upper electrode layer, over the first electrode layer, and a second electrode layer formed over the ferroelectric layer, in which said by-pass capacitor is produced by the steps of:
providing an article comprising a metallic foil having laminated to one surface thereof a layer of the ferroelectric material;
plating a surface of the ferroelectric material layer of said article with an electrically conductive metal to form a first conductor layer covering the surface of the ferroelectric material layer;
selectively etching the first conductor layer to form said first electrode layer;
selectively etching the metal foil of said article to form said second electrode layer opposed through said ferroelectric material layer to said first electrode layer; and
removing the exposed area of said ferroelectric material layer to form said by-pass capacitors having a sandwich structure of said first electrode layer, said ferroelectric layer and said second electrode layer, on the resulting circuit board.
Further, according to still another aspect of the present invention, there is provided a semiconductor device comprising a circuit board having mounted thereon a semiconductor element, in which said circuit board comprises two or more by-pass capacitors formed thereon, each said by-pass capacitor is constituted from a first electrode layer formed in the uppermost layer of the circuit board, a ferroelectric layer formed, from a ferroelectric material having a higher dielectric constant than said upper electrode layer, over the first electrode layer, and a second electrode layer formed over the ferroelectric layer, and the second electrode layer of said by-pass capacitor is electrically contacted with a power source or grounding terminal of said semiconductor element.
Furthermore, according to still another aspect of the present invention, there is provided a process
Sakaguchi Hideaki
Sasaki Masayuki
Paul & Paul
Perkins Pamela
Shinko Electric Industries Co. Ltd.
Zarabian Amir
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