Communications: electrical – Selective – Interrogation response
Reexamination Certificate
2007-02-06
2007-02-06
Garber, Wendy R. (Department: 2612)
Communications: electrical
Selective
Interrogation response
C343S745000, C343S913000
Reexamination Certificate
active
10855866
ABSTRACT:
A circuit arrangement for phase modulation in an input circuit of a backscattering transponder includes a varactor and at most one capacitor connected in series between two antenna terminals, as well as a varactor control arrangement applying a control voltage to the varactor to selectively vary the capacitance thereof. One of the antenna terminals is connected directly to one of the varactor terminals without a capacitor therebetween. The other antenna terminal is connected either directly or through a capacitor to the other varactor terminal. One antenna terminal and/or one varactor terminal can be grounded. A DC-decoupling capacitor can be connected between a transponder circuit unit or a circuit ground and the common junction of the antenna terminal with the varactor terminal. The circuit arrangement is simple, economical, and uses minimal chip area by omitting further capacitors between the antenna terminals.
REFERENCES:
patent: 4040053 (1977-08-01), Olsson
patent: 4518965 (1985-05-01), Hidaka
patent: 4814776 (1989-03-01), Caci et al.
patent: 5119099 (1992-06-01), Haruyama et al.
patent: 5153583 (1992-10-01), Murdoch
patent: 5206639 (1993-04-01), Kamens
patent: 5218343 (1993-06-01), Stobbe et al.
patent: 5321395 (1994-06-01), Van Santbrink
patent: 5430441 (1995-07-01), Bickley et al.
patent: 5446447 (1995-08-01), Carney et al.
patent: 5564069 (1996-10-01), Grabow et al.
patent: 5606323 (1997-02-01), Heinrich et al.
patent: 5731691 (1998-03-01), Noto
patent: 5774062 (1998-06-01), Ikefuji
patent: 5889489 (1999-03-01), Friedman et al.
patent: 6054925 (2000-04-01), Proctor et al.
patent: 6347121 (2002-02-01), Sointula
patent: 6366164 (2002-04-01), Hanselmann
patent: 6664770 (2003-12-01), Bartels
patent: 6941113 (2005-09-01), Asano
patent: 2002/0080864 (2002-06-01), Kuttruff et al.
patent: 2002/0153996 (2002-10-01), Chan et al.
patent: 2003/0102961 (2003-06-01), Fischer et al.
patent: 2003/0107483 (2003-06-01), Kano
patent: 2003/0205571 (2003-11-01), Flugstad et al.
patent: 2004/0145452 (2004-07-01), Fischer et al.
patent: 2004/0155754 (2004-08-01), Fischer et al.
patent: 2004/0257220 (2004-12-01), Fischer et al.
patent: 2005/0104790 (2005-05-01), Duron
patent: 4017625 (1990-12-01), None
patent: 43 32 475 (1995-03-01), None
patent: 19614455 (1997-10-01), None
patent: 2 321 726 (1998-08-01), None
patent: 198 00 565 (1999-07-01), None
patent: 199 33 978 (2001-01-01), None
patent: 19958265 (2001-06-01), None
patent: 10158442 (2003-06-01), None
patent: 0599143 (1994-06-01), None
patent: 1026832 (2000-08-01), None
patent: 1211635 (2002-06-01), None
patent: 2 644 308 (1990-09-01), None
patent: 2 224 182 (1990-04-01), None
Fischer Martin
Friedrich Ulrich
Atmel Germany GmbH
Fasse W. F.
Fasse W. G.
Garber Wendy R.
Yang Clara
LandOfFree
Circuit arrangement with simplified input circuit for phase... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Circuit arrangement with simplified input circuit for phase..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit arrangement with simplified input circuit for phase... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3884143