Circuit arrangement with a multiplexer

Details Circuit arrangement with a multiplexer Circuit arrangement with a multiplexer

1996-07-24

1999-01-26

Chin, Wellington

Multiplex communications

Communication techniques for information carried in plural...

Combining or distributing information via time channels

327407, H04J 302

Patent

active

058645616

ABSTRACT:
To connect one out of N signal channels (K.sub.1, K.sub.2, K.sub.N) each having a signal line (L.sub.1, L.sub.2, L.sub.N) and a channel zero line (N.sub.1, N.sub.2, N.sub.N), where N is greater than one, to one input of a (differential) amplifier (1) whose circuit is referenced to an associated ground (SN), a one-out-of-N multiplexer (2) is provided having 3N switching paths (S.sub.11, S.sub.21, S.sub.31, S.sub.12, S.sub.22, S.sub.32, S.sub.1N, S.sub.2N, S.sub.3N), a first (S.sub.11, S.sub.12, S.sub.1N) of which serves to connect the N signal lines (L.sub.1, L.sub.2, L.sub.N) to said input, and a second (S.sub.21, S.sub.22, S.sub.2N) of which serves to advance the N channel zero lines (N.sub.1, N.sub.2, N.sub.N). The respective inputs of the switching paths of a third switching-path set (S.sub.31, S.sub.32, S.sub.N) are connected to the respective inputs of the switching paths of the second switching-path set (S.sub.21, S.sub.22, S.sub.2N), and the outputs of the latter are commoned to one input of an auxiliary (differential) amplifier (3). The outputs of the third switching-path set (S.sub.31, S.sub.23, S.sub.2N) are commoned to the output of the auxiliary (differential) amplifier, whose circuit is referenced to the ground (SN) of the (differential) amplifier (1).

REFERENCES:
patent: 3249883 (1966-05-01), Berneike
patent: 3665108 (1972-05-01), Bowers, Jr.
patent: 4017687 (1977-04-01), Hartzler et al.
patent: 4056686 (1977-11-01), Zielinski
patent: 4530365 (1985-07-01), Harada et al.
patent: 4891807 (1990-01-01), Hutch
patent: 4905238 (1990-02-01), Rinaldis
patent: 5148121 (1992-09-01), Uchida

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