Circuit arrangement with a data sequence generator

Details Circuit arrangement with a data sequence generator Circuit arrangement with a data sequence generator

1998-06-29

2001-02-20

Chin, Stephen (Department: 2734)

Pulse or digital communications

Systems using alternating or pulsating current

Angle modulation

C375S302000, C375S322000, C708S190000, C708S251000

Reexamination Certificate

active

06192085

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to a circuit arrangement with a data sequence generator for generating an oscillation signal and a sequence of digital data.
In digital technology, it is frequently necessary to generate oscillator signals as sequences of digital data with sinusoidal curves. From the reference literature Schü&bgr;ler: “Digitale Signalverarbeitung” (“Digital signal Processing”), Springer-Verlag, 1988, pp. 15-16, for example, it is known that the data in such a data sequence can be generated by sampling a corresponding continuous signal, by reading a table or by evaluating an appropriate approximation formula. The main disadvantage of this method is that the data sequences either have a low level of accuracy or that the amount of time or circuitry required to generate the data sequences is high.
SUMMARY OF THE INVENTION
The object of the invention is to specify a circuit arrangement of the above described type that has a small number of components and which can be used to generate high-frequency oscillator signals.
This object is solved in accordance with the present invention by a circuit arrangement that contains a data sequence generator with three multiplication units, three adding units, two time-delay units and a weighting unit. The data sequence generator generates three auxiliary signals whose values are changed iteratively as established by a manipulated variable that determines the frequency of the oscillator signal.
For this purpose, the first multiplication unit is driven by the first auxiliary signal and a first control signal, the second multiplication unit by the second auxiliary signal and a second control signal, and the third multiplication unit by the third auxiliary signal and a third control signal, where the first control signal corresponds to the sine of the manipulated variable, the second control signal corresponds to the cosine of the manipulated variable, and the third control signal corresponds to the total of the first and second control signals. Furthermore, the first adding unit is driven by the first and third multiplication units, the second adding unit is driven by the first and second multiplication units, the first time-delay unit is driven by the first adding unit, the second time-delay unit is driven by the second adding unit, and the third adding unit is driven via the weighting unit by the first time-delay unit and by the second time-delay unit. The third auxiliary signal is provided at the output of the first time-delay unit, the second auxiliary signal at the output of the second time-delay unit and the first auxiliary signal at the output of the third adding unit, the third auxiliary signal representing the oscillator signal generated by the data sequence generator.
For generating the three control signals, the circuit arrangement preferably has a control unit that is driven by a digital data value corresponding to the manipulated variable.
In an advantageous development, the data sequence generator is used to generate modulator signals for the I/Q demodulation of a complex input signal. The auxiliary signals generated by it as modulator signals are supplied to an I/Q demodulator which has a fourth multiplication unit driven by the imaginary part of the input signal and the first auxiliary signal, a fifth multiplication unit driven by the real part of the input signal and the second auxiliary signal, a sixth multiplication unit driven by the sum of the real part and the imaginary part and by the third auxiliary signal, a fourth adding unit driven by the fourth and sixth multiplication units, and also a fifth adding unit driven by the fifth and sixth multiplication units. Following demodulation, one then receives a complex output signal the real part of which is available at the output of the fifth adding unit and the imaginary part of which is available at the output of the fourth adding unit.
The input signal is generated preferably in a preprocessing unit by decoding serial input data bits. The decoding can be adapted to various modulation methods, in particular to the methods known under the designations CPM, OQPSK, MSK and GMSK, where CPM stands for continuous phase modulation, OQPSK for offset quadrature phase shift modulation, MSK for minimum shift keying and GMSK for Gaussian minimum shift keying. Methods of this kind are used, for example, in cordless telephones or in radiotelephones.
Because of the small number of components and the consequently small amount of space required, the circuit arrangement is ideally suitable for integration on a semiconductor chip. It can therefore be produced at low cost and furthermore, because there are few components, it consumes little power.


REFERENCES:
patent: 3754101 (1973-08-01), Daspit et al.
patent: 5260968 (1993-11-01), Gardner et al.
patent: 5828705 (1998-10-01), Kroeger et al.
patent: 29 27 713 (1980-04-01), None
Schüssler, Hans Wilhelm,Digitale Signalverarbeitung[Digital Signal processing], vol. 1, Pub. Springer-Verlag, Berlin, 1988, pp. 15 & 16.

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