Circuit arrangement to double the clock frequency for a data tra

Details Circuit arrangement to double the clock frequency for a data tra Circuit arrangement to double the clock frequency for a data tra

1996-10-09

1997-12-02

Mis, David

Oscillators

Combined with particular output coupling network

Space discharge or unilaterally conductive device in output...

331158, 331177R, 327122, H03B 100, H03B 532, H03B 1900

Patent

active

056940912

ABSTRACT:
A circuit arrangement is indicated to generate a clock frequency for a data transmission system by using a voltage-controlled fundamental wave quartz oscillator (VCXO), whose frequency can be changed within narrow limits as a function of the control voltage. To double the frequency of the fundamental wave quartz oscillator (VCXO), its output (A) is connected to the input of a rectifier bridge circuit (1) having an ohmic resistance (2) placed at its output. The ohmic resistance (2) is connected to both inputs of a comparator (3), and the clock frequency (f) is present at the output of the comparator.

REFERENCES:
patent: 5434522 (1995-07-01), Fikart et al.
U. Tietze-Ch. Schenk, Halbleiter-Schaltungstechnik, Springer, Berlin, Heidelberg, New York 1990, pp. 468-473.

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