Circuit arrangement for voltage regulation

Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...

Reexamination Certificate

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C323S275000, C323S284000, C323S285000

Reexamination Certificate

active

06989660

ABSTRACT:
The invention specifies a circuit arrangement for voltage regulation in which, in addition to a control loop having a comparator (4), an output stage (3) and a feedback path, an auxiliary regulator (11–14) is provided which limits the voltage drop across the output stage (3) and, for this purpose, comprises a control element (11) and a further comparator (13). Hence, the output stage (3) of the voltage regulator may advantageously have a withstand voltage which is lower than the supply voltage which can be supplied at the input (1). On account of its good supply voltage suppression, the voltage regulator described is particularly well suited to supplying on-chip VCOs.

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patent: 5528129 (1996-06-01), Kaneko et al.
patent: 5629609 (1997-05-01), Nguyen et al.
patent: 5864225 (1999-01-01), Bryson
patent: 5991168 (1999-11-01), Farrington et al.
patent: 0 376 655 (1990-07-01), None
“The Design of an Automotive Low Drop Out Regulator IC Utilizing a Depletion Mode High Voltage DMOS Pass Element”, Robert Wrathall and Stephen Franck, Power Electronics in Transportation, Oct. 20-21, 1994, pp. 17-22.
“A High-Speed, Low-Power Clock Generator for a Microprocessor Application”, Vincent R. Von Kaenel, IEEE Journal of Solic-State, vol. 33, No. 11, Nov., 1998, pp. 1634-1639.
“Embedded 5 V-to-3.3 V Voltage Regulator for Supplying Digital IC's in 3.3 V CMOS Technology”, Gerrit W. Den Beston and Bram Nauta, IEEE Journal of Solid-State Circuits, vol. 33, No. 7, Jul., 1998, pp. 956-962.

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