Circuit arrangement for use in the time division multiplexed sig

Multiplex communications – Wide area network – Packet switching

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Details

3701101, 375111, H04J 306

Patent

active

049842366

ABSTRACT:
In a forty megabit per second TDM signalling system in which twenty 2 megabit per second signalling streams are combined, one of the twenty primary signalling streams is inverted by the circuit arrangement and substituted for one of the other signalling streams. By using adjacent channels the forty megabit signal stream has a guaranteed change of data at least once every twenty bits. The system facilitates clock recovery and synchronization in apparatus employing bi-phase mark encoded data.

REFERENCES:
patent: 3924080 (1975-12-01), Caldwell
patent: 4133978 (1979-01-01), Hewlett, Jr.
patent: 4161719 (1979-07-01), Parikh et al.
patent: 4247936 (1981-01-01), Hustig
patent: 4740998 (1988-04-01), House
patent: 4744082 (1988-05-01), Fujimura et al.
patent: 4747112 (1988-05-01), Blondeau, Jr. et al.
patent: 4787095 (1988-11-01), Forth et al.

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