Patent
1996-11-27
1999-08-10
Harrell, Robert B.
G06F 945
Patent
active
059371935
ABSTRACT:
A translating circuit coupled to a processor and memory of a computer system translates platform-independent instructions such as Java bytecodes into corresponding native instructions for execution by the processor. In one embodiment, the translating circuit is incorporated into the same integrated circuit device as the processor. In another embodiment, the translating circuit is provided within one or more external integrated circuit devices. One or more look-up tables map platform-independent instructions into one or more native instructions for the processor, thereby minimizing software-based interpretation of platform-independent program code. Moreover, platform-independent instructions are mapped to native instructions on-the-fly, or alternatively, in blocks prior to execution using a state machine.
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Andrew S. Tanenbaum, "Structured Computer Organization" (1984) pp. 10-12, 1984.
The ARM6 Family Bus Interface, Advanced RISC Machines Ltd. (1996).
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Wayner, "Sun Gambles On Java Chips", Byte, Nov. 1996.
Java Virtual Machine Architecture, Sun Microsystems (1996).
Harrell Robert B.
VLSI Technology Inc.
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