Circuit arrangement for the transmission of digital data

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307DIG1, 307269, 328 63, 340147SY, H03K 513

Patent

active

042899761

ABSTRACT:
A circuit arrangement is described for the transmission of a digital data signal. The circuit arrangement is inserted as an asynchronous interface into the transmission path between digital data handling systems with differing clock frequencies f.sub.1 and f.sub.2. The circuit arrangement comprises a register 1 of D flip-flops for buffering the input data D.sub.1. The clocking of the register 1 is performed with a special clock signal f.sub.Inter, which is derived from a series circuit of edge controlled R-S and J-K flip-flops 3 and 4 respectively. The result is output data D.sub.2 synchronous with the frequency f.sub.2.

REFERENCES:
patent: 3920918 (1975-11-01), Thomas
patent: 3979732 (1976-09-01), Hepworth et al.
patent: 4039960 (1977-08-01), Clark
patent: 4045662 (1977-08-01), Scopaz
Interfacing A Teletypewriter With An IC Microprocessor, by Robert Stevens, Electronics, 7/74, p. 99.

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