Circuit arrangement for the timed control of semiconductor switc

Details Circuit arrangement for the timed control of semiconductor switc Circuit arrangement for the timed control of semiconductor switc

1988-05-20

1990-02-13

Roskoski, Bernard

Electricity: motor control systems

Closed loop speed control system for dc motor with commutator

Armature control by digital or combined analog and digital...

388910, 388915, 388921, 388909, 388930, H02P 100

Patent

active

049013661

ABSTRACT:
In a circuit arrangement for the timed control of semiconductor switches (1-4) to each of which a freerunning diode (D1-D4) is connected in parallel and which are arranged in branches of a bridge, an ohmic-inductive load (5) of low loss power which lies in the diagonals of the bridge is to be acted on by a controlled average current value. For this purpose two semiconductor switches (for instance 1, 4) lying diagonally opposite each other in the bridge are closed in a current-application phase while in the following freerunning phase a freerunning current flows through the load. For the reduction of the loss power, at the start of the freerunning phase only one (1) of the two diagonally opposite semiconductors (1,4) is opened and a semiconductor switch (3) which lies in the bridge alongside the conductive semiconductor switch (4) is then closed. Before the start of a current-application phase which follows this, the semiconductor switch (3) which lies in the bridge alongside the closed semiconductor switch (4) is opened before the opened semiconductor switch ( 1) of the two diagonally opposite semiconductor switches (1,4) is closed again.

REFERENCES:
patent: 4066940 (1978-01-01), Henderson
patent: 4217528 (1980-08-01), Scheying et al.
patent: 4388571 (1983-06-01), Tada et al.
patent: 4477751 (1984-10-01), Kanayama
patent: 4527103 (1985-07-01), Kade
patent: 4544869 (1985-10-01), Pittaway
patent: 4562393 (1985-12-01), Loyzim et al.
patent: 4568864 (1986-02-01), Gisske
patent: 4581565 (1986-04-01), Van Pelt et al.
patent: 4616305 (1986-10-01), Damiano et al.
patent: 4649326 (1987-03-01), Mansmann et al.
patent: 4686438 (1987-08-01), Ohe et al.
patent: 4710686 (1987-12-01), Guzik

Affiliated with

Also associated with

Rating

Circuit arrangement for the timed control of semiconductor switc does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Circuit arrangement for the timed control of semiconductor switc, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit arrangement for the timed control of semiconductor switc will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1174900