Circuit arrangement for the linearization and temperature compen

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36457101, 73708, 73766, G01L 1904

Patent

active

056046855

ABSTRACT:
A circuit arrangement for the linearization and temperature compensation of capacitive sensor signals is provided which requires few components and wherein the compensated input signal is obtained fast. The arrangement includes: a clock generator; a reference capacitor; a measuring capacitor; a temperature-dependent voltage divider connected between an operating and a reference potential which measures the temperature of the measuring capacitor; an adjusting circuit which acts on the measuring capacitor and the reference capacitor and having a first input connected to the operating potential, a second input connected to the voltage divider, and a third input; an integrating stage connected to the measuring capacitor and the reference capacitor and having its output coupled to the third input of the adjusting circuit, the output being the output of the arrangement. The output signal is ##EQU1## where C.sub.v =(C.sub.m -C.sub.r)/C.sub.m, (C.sub.m -C.sub.r)/(C.sub.m +C.sub.r) , or (C.sub.m -C.sub.r)/C.sub.r ; C.sub.m is the capacitance of the capacitor; C.sub.r is the capacitance of the reference capacitor; U is the operating potential; a.sub.0 is a zero adjustment value; a.sub.1 is a temperature coefficient zero adjustment value; a.sub.2 is a first span adjustment value; a.sub.3 is a temperature coefficient span adjustment value; b.sub.0 is a second span adjustment value; b.sub.1 is a linearization adjustment value, and v.sub.1 is the temperature-dependent resistance ratio of the voltage divider.

REFERENCES:
patent: 4289035 (1981-09-01), Lee
patent: 4392382 (1983-07-01), Myers
patent: 4550611 (1985-11-01), Czarnocki
patent: 4751654 (1988-06-01), Lyyra
patent: 5257210 (1993-10-01), Schneider et al.

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