Circuit arrangement for the equalization of digital signals rece

Details Circuit arrangement for the equalization of digital signals rece Circuit arrangement for the equalization of digital signals rece

1989-09-26

1991-06-25

Safourek, Benedict V.

Pulse or digital communications

Repeaters

Testing

370 321, H04L 514

Patent

active

050273701

ABSTRACT:
A circuit arrangement for the equalization of digital signals received in analog form. The circuit arrangement is used in a digital signal receiving system for the equalization of digital signals received in analog form through an analog/digital converter which have been distorted by precursors and postcursors of subsequent or previously transmitted digital signals. In this case, the circuit arrangement includes a postcursor equalizer and a precursor equalizer connected with it that is designed as a transverse filter and multiplies a digital signal received at a sampling interval n by a main coefficient and, in addition, a predetermined number of digital signals immediately following the digital signal in question in each case by a predetermined secondary coefficient and sums that resulting product signal, with the aid of an adder, to a sum signal. In addition, the secondary coefficient immediately preceding the main coefficient is weighted with a predetermined factor and multiplied with a digital signal occurring at the scanning time n-1. A total sum signal is then formed, with the aid of the adder, from the resulting product signal and the first sum signal.

REFERENCES:
patent: 3597541 (1971-08-01), Proakis et al.
patent: 3670269 (1972-06-01), Starr et al.
patent: 4504958 (1985-03-01), Tamburelli
IEEE Intl. Conf. on Comm., Jun. 1985, vol. 2, Grafinger et al., "Design and Realization of a High Speed Multilevel . . . ", pp. 971 to 976.
NTG Technical Reports 88, "Approaches to the Integrated Communication Network", pp. 50 to 57, Mar. 1985.

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