Electrical pulse counters – pulse dividers – or shift registers: c – Applications – Measuring or testing
Patent
1987-05-13
1989-02-21
Heyman, John S.
Electrical pulse counters, pulse dividers, or shift registers: c
Applications
Measuring or testing
377 26, 377 28, 377 33, G01C 2200
Patent
active
048072648
DESCRIPTION:
BRIEF SUMMARY
PRIOR ART
The invention is based on a circuit arrangement for the addition, storage and reproduction of a quantity of electric counting pulses according to the generic part of the main claim.
In such a known circuit arangement (DE-OS No. 31 23 654), the counting pulses are read in a multiple-digit decadic counting mechanism and conveyed to a nonvolatile, decadic storage which can be overwritten. Since this storage must have a long storage time of at least 10 years, as well as a working temperature range of -25.degree. C. to +70.degree. C., for the use of kilometer counters in motor vehicles, floating-gate storage cells are used in the known circuit arrangements; however, these floating-gate storage cells require erasure times which increase as the quantity of erasure processes increases. Similar problems result when other so-called EEPROMs, in which the quantity of erasures should also not exceed the value of 10,000, are used as storages.
In order to limit the erasure processes in the individual storage cells, each decade of the multiple-decade counter is constructed from a 5-bit shift register in the known circuit arrangement, and the individual counting pulses are read into the ones decade in a unit-distance or cyclic code, preferably with the Libraw-Craig code. Every tenth counting pulse is read into the tens decade according to the same code, every hundredth counting pulse is read into the hundreds decade, etc. The storage connected to the multiple-decade counter is likewise constructed in multiple-decades in order to be able to store the counting pulses therein with the same unit-distance distance code. In order to distribute the number of erasure processes of the nonvolatile storage in the low decades as uniformly as possible, the assignment of the low decades of the storage to the low decades of the counter are exchanged in a cyclical manner as intervals of 100,000 kilometers, for example.
However, this solution has the disadvantage that the errors which accordingly occur in the kilometer indicator during the failure of a storage cell can be so considerable that the indicated value no longer allows inferences to be made as to the actual counter state. If such an error occurs, for example, in the higher decades of the storage in the storage cell which was written on last, or in the storage cell prior to the latter, the deviations can amount to 100, 1000, 10,000 or 100,000 kilometers.
The present solution attempts to construct a nonvolatile overwritable storage in such a way that the writing and erasing processes in the individual storage cells remain within the required time period within the framework of the allowable limits on the one hand, and, moreover, the deviation of the storage contents from the correct value does not exceed the smallest counting unit during the occurrence of an error in the storage cell.
SUMMARY AND OBJECTS OF THE INVENTION
The circuit arrangement, according to the invention, has the advantage that an electronic counter, e.g. a kilometer counter for motor vehicles with a very long service life and high accuracy, can be realized with a relatively small, overwritable, nonvalatile storage by means of the selected unit-distance code in that only one of the storage registers is modified by one unit in each instance in a rotating manner with each new counting pulse.
The erasing processes are uniformly distributed in the individual storage cells of the entire storage by means of the rotating actuating of all registers. It is another advantage that there is a high redundancy as a result of this storage process, since the failure of individual storage cells can no longer lead to the total failure of the entire counter. Rather, with the present solution, the number of erroneous storage locations results, in the most unfavorable case, in a counter state which is incorrect by the same number.
Advantageous developments and improvements of the characteristic features indicated in the main claim are made possible by means of the steps shown in the subclaims. It is particularly advisabl
REFERENCES:
patent: 4528683 (1985-07-01), Henry
Heyman John S.
Robert & Bosch GmbH
Striker Michael J.
LandOfFree
Circuit arrangement for the addition, storage and reproduction o does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Circuit arrangement for the addition, storage and reproduction o, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit arrangement for the addition, storage and reproduction o will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1528747