Circuit arrangement for synchronization of a signal

Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry

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358158, 331 1R, 331 1A, 331 11, 331 20, 331 25, 375111, 375120, 329122, H04N 504, H03L 700

Patent

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046724478

ABSTRACT:
In a circuit arrangement for synchronization of the phase of a frequency-divided signal with an edge of finite slope of an essentially periodic synchronizing signal with an oscillator supplying a clock signal, a frequency divider which generates the frequency-divided signal and a phase detector which comprises a first comparator for coarse phase detection, a second comparator for fine phase detection and a selector circuit which derives a resulting phase signal applied to the oscillator to control the frequency of the clock signal and originating from the first comparator in the case of large phase variations and from the second comparator in the case of small phase variations, precise adjustment to the edge is nevertheless achieved in the case of an amplitude-discrete synchronizing signal with limited time resolution because of the fact that the synchronizing signal is applied to the phase detector as a sequence of amplitude-discrete values which is formed by sampling the synchronizing signal with the clock signal, a sufficient number of amplitude stages being provided for the edge in the synchronizing signal.

REFERENCES:
patent: 4214260 (1980-07-01), van Straaten
patent: 4461999 (1984-07-01), Wolf et al.
patent: 4574307 (1986-03-01), Nillesen

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