Circuit arrangement for selecting an image data correction schem

Details Circuit arrangement for selecting an image data correction schem Circuit arrangement for selecting an image data correction schem

1993-03-26

1994-11-29

Rogers, Scott A.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358460, 358458, H04N 140

Patent

active

053695062

ABSTRACT:
A number of kinds of gradation correction data is prepared beforehand, and when the type of a facsimile machine is specified, a host CPU selects among the gradation correction data some gradation correction data in accordance with the type of the facsimile machine. Then, the selected gradation correction data are written into the RAM to make a gradation correction table optimum for the type of the facsimile machine. When the gradation correction data are written into the RAM, addresses of these data are determined in accordance with pixel signal levels of image data to be scanned. Therefore, when the image data is scanned, correction data which are stored at addresses corresponding to the pixel signal levels of the image data are successively output from the RAM and the gradations of respective segments of the image data are corrected with the respective correction data.

REFERENCES:
patent: 4805013 (1989-02-01), Dei et al.
patent: 4972500 (1990-11-01), Ishii et al.

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