Circuit arrangement for recovering clock and data from a...

Details Circuit arrangement for recovering clock and data from a... Circuit arrangement for recovering clock and data from a...

2007-02-27

2007-02-27

Bayard, Emmanuel (Department: 2611)

Pulse or digital communications

Synchronizers

C327S165000

Reexamination Certificate

active

10301444

ABSTRACT:
A circuit arrangement to recover clock and data from a received signal comprises an electronic commutator for sampling the received signal in such a way that several sampling values of a bit cell transmitted with the received signal are distributed time-wise one after the other onto several output connections of the commutator device and emitted there in the form of corresponding intermediate signals. A first circuit combines a first group of intermediate signals of the commutator device into a first uniting signal, which serves as the basis for data recovery or comprises the recovered data signal, while a second circuit combines a second group of intermediate signals of the commutator device into a second uniting signal, which serves as the basis for clock recovery. The second uniting signal is fed to a phase regulator arrangement, which, dependent on this, sets the sampling phases assigned to the individual output connections of the commutator device.

REFERENCES:
patent: 3793636 (1974-02-01), Clark et al.
patent: 5347548 (1994-09-01), Messerges et al.
patent: 5699389 (1997-12-01), Beladi et al.
patent: 5901189 (1999-05-01), Rose
patent: 6047033 (2000-04-01), Chen
patent: 2005/0058235 (2005-03-01), Beenson et al.
patent: 2005/0110544 (2005-05-01), Suda et al.

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