Multiplex communications – Wide area network – Packet switching
Patent
1979-09-04
1981-09-15
Olms, Douglas W.
Multiplex communications
Wide area network
Packet switching
370100, 375114, 179 18FA, H04J 312, H04J 306
Patent
active
042901359
ABSTRACT:
A communication circuit arrangement for receiving digital intelligence signals as, for example, in a digital switching center of a PCM-time-division multiplex communication network wherein signals are transmitted on circuits connected to digital subscriber stations and the signals are in the form of intelligence signal blocks having at least one intelligence signal word and including a synchronizing word ahead of the intelligence signal word. So as to compensate for the fluctuating phase relationship occurring in the received signals, the first bit of the intelligent block is determined using a signal evaluation device and a clock pulse signal having a phase which is selected using a clock pulse selection circuit and wherein a synchronous counter is set to zero. The counter generates release signals for a plurality of registers for the individual portions of the intelligence block and a comparator test for the presence of a proper synchronizing word. Depending on the results of this comparison, the adjusting procedures are repeated upon the occurrence of the next block or alternatively the system continues to function with the incoming data.
The determination of the first bit of an intelligence signal block allows the selection of a bit clock pulse sequence in proper phase and allows the setting of the synchronous counter which controls the acceptance of intelligence into the various registers.
REFERENCES:
patent: 3558827 (1971-01-01), Lucas et al.
patent: 3970799 (1976-07-01), Colton et al.
patent: 3986120 (1976-10-01), Edstrom et al.
Olms Douglas W.
Siemens Aktiengesellschaft
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