Circuit arrangement for receiving and/or transmitting serially a

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G11C 700, G11C 1900

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active

046912975

ABSTRACT:
For receiving and/or transmitting serially appearing binary signals to and from a processing device containing a microcomputer or microprocessor, the signal receiving lines carrying the serially appearing binary signals are connected by way of individual flip-flop elements to an input of the microcomputer or microprocessor, and signal output lines are connected by way of individual flip-flop elements to respective outputs of the microcomputer or microprocessor. In the microcomputer or microprocessor, the serial appearing binary signals are converted into parallel signals for processing, and the processed parallel signals are reconverted into serial signals for signal transmission.

REFERENCES:
patent: Re30182 (1979-12-01), Howson
patent: 3516074 (1970-06-01), Enomoto
patent: 3656150 (1972-04-01), Kato
patent: 4402078 (1983-08-01), Athenes
patent: 4426685 (1984-01-01), Lorentzen
"Peripheral Design Handbook", Intel Corporation, 1978, pp. 1-24,-1-39.

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