Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Patent
1992-04-20
1993-10-12
Shoop, Jr., William M.
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
318727, 318254, 323351, 307320, H02P 540, G05F 140, H03K 326
Patent
active
052529070
ABSTRACT:
A circuit arrangement is provided to mitigate the parasitic capacitance that typically is associated with solid state switches which are designed to carry high current magnitudes. By disposing a capacitive component in series with a power switch which, in turn, is connected in series with an inductive component, the overall capacitance of the switch and capacitive component are significantly reduced. In a preferred embodiment of the present invention, the capacitive component is a diode with a voltage potential provided at the cathode of the diode so that the parasitic capacitance of the diode can be varied to tune the total circuit for the purpose of achieving a specific resonant frequency. In applications where high frequency signals are injected into the circuit for purposes of measuring a parameter, such as rotor position, the present invention is beneficial because of the ability to tune the frequency resulting from the residence of the series LC circuit which comprises a conductive component, such as a motor stator winding, and a capacitive component, such as a power switch which possesses an inherent parasitic capacitance. Another benefit of the present invention is the fact that it makes possible the use of smaller components in a snubber network associated with the inductive component because of the increase in resonant frequency achieved by the decrease in capacitance of the series LC circuit.
REFERENCES:
patent: 3560821 (1969-04-01), Beling
patent: 4584506 (1986-04-01), Kaszmann
patent: 4609859 (1986-09-01), Williams
patent: 4763056 (1988-08-01), Byrne et al.
patent: 5075610 (1991-12-01), Harris
Harris William A.
Pearman Arthur N. J.
Cabeca John W.
Honeywell Inc.
Lanyi William D.
Shoop Jr. William M.
LandOfFree
Circuit arrangement for mitigating power switch capacitance does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Circuit arrangement for mitigating power switch capacitance, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit arrangement for mitigating power switch capacitance will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1907241