Circuit arrangement for interference-free storage of information

Details Circuit arrangement for interference-free storage of information Circuit arrangement for interference-free storage of information

1976-01-23

1977-03-22

Fears, Terrell W.

Communications: electrical

Digital comparator systems

340173SP, G11C 1140, G11C 1700

Patent

active

040140083

ABSTRACT:
A circuit arrangement for interference-free storage of information in a programmable read only memory in which the storage elements comprise a circuit element and an interruptable resistor arranged between intersecting row lines and column lines and in which information of one type is stored in a storage element by interrupting the resistor with a flow of a predetermined current therethrough which is large when compared to current flow during a reading operation, employs a regulating transistor per column line whose emitter is connected to the assigned column line, whose collector is connected to an operating voltage, and whose base is connected to a reference voltage. The value of the base reference voltage is selected such that the regulating transistor is rendered conductive only if the voltage on the column line drops below a predetermined value during the interruption of the resistor of a storage element.

REFERENCES:
patent: 3739355 (1973-06-01), Radcliffe

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