Circuit arrangement for generating non-overlapping clock phases

Details Circuit arrangement for generating non-overlapping clock phases Circuit arrangement for generating non-overlapping clock phases

2005-01-04

2005-01-04

Wells, Kenneth B. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

C327S295000

Reexamination Certificate

active

06838922

ABSTRACT:
A circuit arrangement for generating non-overlapping clock phases including a first circuit, a second circuit, and a multiplexer. The first circuit combines two input signals to form an output signal, and a first input provides for application of a common clock signal. The second circuit combines two input signals to form an output signal, and a first input provides for application of the common clock signal. The multiplexer has a first input connected to an output of the first circuit, a second input connected to an output of the second circuit, and an output connected to a second input of each of the first and second circuits, and has a third input that switches between the first and second inputs of the multiplexer for application of the clock signal. A plurality of non-overlapping clock phases are provided by output signals of the first and second circuits and of the multiplexer.

REFERENCES:
patent: 5111066 (1992-05-01), Artieri et al.
patent: 5389831 (1995-02-01), Eisenstadt
patent: 6163194 (2000-12-01), Truong et al.
patent: 0 053 014 (1982-06-01), None
patent: 0 418 419 (1991-03-01), None
patent: 59-149417 (1984-08-01), None
patent: 6-152347 (1994-05-01), None

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