Circuit arrangement for generating a clock signal which is synch

Details Circuit arrangement for generating a clock signal which is synch Circuit arrangement for generating a clock signal which is synch

1987-09-08

1989-05-30

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

328 63, 328 72, 328133, 307269, 331 18, H03K 513, H03K 522

Patent

active

048354813

ABSTRACT:
In addition to a filter phase comparator, an integrator, a first filter and a voltage-controlled oscillator of relatively low stability and having a wide pull-in range, a circuit arrangement for generating a clock signal comprises a frequency generator of high stability having a narrow pull-in range, a second phase comparator and second and third filters. The first phase comparator is supplied with the reference frequency and the clock signal emitted by the voltage-controlled oscillator. The second phase comparator is supplied with the clock signal and a normal frequency generated by a normal frequency generator. In the event of the failure of the reference frequency or the overshooting of predetermined phase difference values, a regulating circuit formed by the second phase comparator, the second filter, the third filter and the voltage-controlled oscillator is closed.

REFERENCES:
patent: 3602828 (1971-08-01), Kurzwell, Jr.
patent: 4205277 (1980-05-01), Poinas
patent: 4538110 (1985-08-01), Hollaar et al.
patent: 4686482 (1987-08-01), Zoetman et al.
patent: 4695805 (1987-09-01), Massingill et al.

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