Circuit arrangement for frequency conversion of a digital signal

Coded data generation or conversion – Digital code to digital code converters – Data rate conversion

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358140, 370 84, H03M 700, H04N 713, H04J 322

Patent

active

052046761

ABSTRACT:
A circuit arrangement for converting a digital signal of a first frequency into a signal of a second frequency and including an interpolator/decimator is characterized, notably for asynchronous first and second clock signals, in that there is provided at least one multiplexer arrangement which includes a first register which is clocked at the inverted first clock frequency and a second register which is clocked at the second clock frequency, and also includes a multiplexer, the input signal of the multiplexer arrangement being applied to the first register and to a first input of the multiplexer whose second input is coupled to the output of the first register, there also being provided a control circuit which alternately switches the signals applied to the two inputs of the multiplexer to its output in such a manner that at the instants at which this signal is written into the second register a valid signal is always present at the output of the multiplexer.

REFERENCES:
patent: 4612573 (1986-09-01), Grallert et al.
patent: 4797845 (1989-01-01), Stikvoort
patent: 4989221 (1991-01-01), Qureshi et al.
patent: 4996528 (1991-02-01), Asghar et al.
patent: 5111488 (1992-05-01), Chaisemartin et al.

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