Circuit arrangement for frame and phase synchronization of a loc

Pulse or digital communications – Spread spectrum – Direct sequence

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Details

370105, 375119, H04L 708

Patent

active

045984131

ABSTRACT:
With such a circuit arrangement, the sampling clock is synchronized to the frame position and the phase of the characters of a received character stream containing a "unique word" at regular intervals. In a digital correlator (1), a crosscorrelation function is generated from a unique word stored therein and from the received, sampled character stream, and a frane detection circuit (2) derives a frame clock (RT1) from those maxima of the crosscorrelation function recurring at intervals of one frame period. To achieve synchronization at any polarity of the received character stream (i.e., even if the tip and ring wires of the subscriber line are interchanged), a second frame detection circuit (3) derives a second frame clock (RT2) from those minima of the crosscorrelation function recurring at intervals of one frame period. A clock selection circuit (8) determines which of the two frame clocks is received within a limited time interval. From this frame clock, control information for representing the phase of the sampling clock (AT) is derived in a phase synchronization circuit (10).

REFERENCES:
patent: 3144515 (1964-08-01), Kaneko
patent: 3251034 (1966-05-01), Goode et al.
patent: 3575554 (1971-04-01), Schmidt
patent: 3641274 (1972-02-01), Sasaki et al.
patent: 3735045 (1973-05-01), Clark
patent: 3770897 (1973-11-01), Haussman et al.
patent: 3798378 (1974-03-01), Epstein
patent: 4112498 (1978-09-01), Reiner et al.
patent: 4203002 (1980-05-01), Nossen
Digital Synchronizer--R. J. Galpin, IBM Technical Disclosure Bulletin, vol. 15, No. 1, Jun. 1972, pp. 81-82.

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