Circuit arrangement for forming the sum of products

Details Circuit arrangement for forming the sum of products Circuit arrangement for forming the sum of products

1996-08-13

1997-07-22

Ngo, Chuong D.

Boots, shoes, and leggings

G06F 700

Patent

active

056509529

ABSTRACT:
In processors, notably digital signal processors, it is often necessary to form the sum of products of a concatenation of data word pairs, for example for correlation or convolution operations, in which the one data word of each pair can assume only one of the two values +1 or -1. In accordance with the invention, in that case instead of forming a product in a multiplier, the one data word of each pair is applied to an add/subtract device in order to control the function thereof in respect of addition or subtraction; one input of the add/subtract unit then receives the other data words of the data word pairs, and the other input is connected to the output of the accumulator register. Thus, a complex multiplier device is saved or, should such a device be present anyway, it will not be used so that the power loss of the processor is reduced.

REFERENCES:
patent: 4025772 (1977-05-01), Constant
patent: 5128890 (1992-07-01), Girardeau, Jr.
"Overflow Detection in Multioperand Addition" P. Pai et al, Journal of Electronics, 73(1992) Sep. No. 3, London.

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