Circuit arrangement for digitally setting the gain of a digitall

Details Circuit arrangement for digitally setting the gain of a digitall Circuit arrangement for digitally setting the gain of a digitall

1990-02-21

1991-08-27

Olms, Douglas W.

Pulse or digital communications

Repeaters

Testing

455239, 455240, 455234, H04L 2530, H04L 2708

Patent

active

050439995

ABSTRACT:
Circuit arrangement for digitally setting the gain factor of a digitally adjustable receive amplifier. For digitally setting the gain factor of a digitally adjustable receive amplifier independently of the reception signal, the circuit arrangement for positive and negative reception signals amplified by the gain factor has comparators whose outputs are fed back via respective feedback switching network to a comparison input of the respective appertaining comparator. As a result of the feedback switching networks the signal level at each of the comparison inputs has different comparison values which are dependent on the signal levels at the output of the respective comparator. Whenever the signal level of the reception signal exceeds one of the comparison values, a counter, that may be a non-linear counter, is decremented by one step and thereby provides a counter reading indicating the gain. After every transmitted data block, the counter is reset to the highest counter reading by a retriggerable, monostable circuit having an appropriate holding time that monitors the data block transmission by retriggering on the basis of the reception signal.

REFERENCES:
patent: 4301445 (1981-11-01), Robinson
patent: 4581731 (1986-04-01), Tomlkashl
patent: 4613973 (1986-09-01), Dahl
patent: 4637064 (1987-01-01), Roberts et al.
patent: 4707840 (1987-11-01), Nakayama
patent: 4768204 (1988-08-01), Zeiss
patent: 4829593 (1989-05-01), Hara

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