Circuit arrangement for detecting double connections in digital

Details Circuit arrangement for detecting double connections in digital Circuit arrangement for detecting double connections in digital

1974-02-22

1976-02-10

Blakeslee, Ralph D.

179 15BF, 179 18AH, H04J 300

Patent

active

039378950

ABSTRACT:
Apparatus is described for detecting undesirable duplications in connections in time division multiplex telecommunication systems, e.g., pulse code modulated telephone systems. The multiplex trunks are coupled through time coupling stages which may take the form of storages allocated to individual trunks, and the trunks are connectable in pairs, by means of cross-point switches, over pairs of time multiplex channels to outgoing time division multiplex trunks. A parity generator and an OR gate are inserted between the trunk-challel side terminals of the crosspoint switches extending from the incoming trunk in question to the same trunk and the trunk in question. An output of the parity generator is coupled, along with an output of the OR gate, to an exclusive OR gate, which produces an output signal responsive to a dissimilarity in inputs. The appearance of the latter output signal indicates the existence of a double connection.

REFERENCES:
patent: 3637946 (1972-01-01), Hamrick
patent: 3740484 (1973-06-01), Laggy
patent: 3760107 (1973-09-01), Duerdoth

Affiliated with

Also associated with

Rating

Circuit arrangement for detecting double connections in digital does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Circuit arrangement for detecting double connections in digital , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit arrangement for detecting double connections in digital will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-151120