Circuit arrangement for detecting a TV synchronizing signal

Details Circuit arrangement for detecting a TV synchronizing signal Circuit arrangement for detecting a TV synchronizing signal

1992-07-09

1993-12-28

Powell, Mark R.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358158, 358159, 331 20, H04N 505

Patent

active

052744485

ABSTRACT:
A circuit for detecting a square wave television signal in a television receiver includes an oscillator for generating the square wave signal and a phase locked loop (PLL) for synchronizing the square wave signal with the syn pulses of the televsion receiver. The circuit also includes an integrator for switching the output signal of the PLL to a frequency stable square wave signal when the syn pulses are absent and a Schmitt trigger for closing the PPL when a threshold value is reached. With the invention, the syn signals are sensed and a first switchable constant current source increases the output voltage of the integrator for a predetermined period of time when syn pulses are present during the first half of the square wave signal and discharges the integrator when syn signals are absent from the second half of the square wave signal.

REFERENCES:
patent: 4092672 (1978-05-01), Aschwanden
patent: 4555679 (1985-11-01), Katsuyama
patent: 4677484 (1987-06-01), Pitsch et al.
patent: 4860102 (1989-08-01), Dieterle et al.
patent: 5038116 (1991-08-01), Motte 358158
IEEE Transactions on Consumer Electronics, Band 35, Nr. 3, Aug. 1989, IEEE, Y. Baba et al: "A new multistandard video processor including deflection drive circuits which is controlled by digital process", pp. 308-313.

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