Circuit arrangement for detecting a critical frequency of input

Details Circuit arrangement for detecting a critical frequency of input Circuit arrangement for detecting a critical frequency of input

1988-02-08

1989-11-21

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

328141, 307522, 377 28, H03K 906, H03D 360

Patent

active

048825450

ABSTRACT:
Input pulses are applied to toggle a first bistable whose output provide clock signals to a monostable timer whose period is set to the duration of one cycle of the input pulse a a critical frequency. A second bistable enables a third bistable and a counter only if an edge of a pulse from the timer occurs in an interval of the clock signals from the bistable. Thereafter the counter is clocked by pulses which are derived from the clock signals of the first bistable by the third bistable. The counter provides an indication after a predetermined number of the input pulses which have reached the critical frequency. An output signal derived from the indication may be maintained by a fourth bistable.

REFERENCES:
patent: 3500375 (1970-03-01), Klimo
patent: 3943382 (1976-03-01), Hermansdorfer et al.
patent: 4211982 (1980-07-01), Smith
patent: 4353091 (1982-10-01), Hoppe
patent: 4360782 (1982-11-01), Nowell
patent: 4427948 (1984-01-01), Rinaldi
patent: 4629915 (1986-12-01), Suzuki et al.

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