Circuit arrangement for demodulating a video signal

Television – Receiver circuitry – Demodulator

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348537, 348735, H04N 5455

Patent

active

055260616

ABSTRACT:
Circuit arrangement for demodulating a video signal (IF signal) which is frequency-modulated on an intermediate-frequency carrier oscillation, including a first demodulation stage (a frequency or phase demodulator) for multiplicatively combining the IF signal with a carrier oscillation of a controllable oscillator and for supplying a first output signal, a second demodulation stage (a frequency or phase demodulator) for multiplicatively combining the IF signal with the carrier oscillation phase-shifted by a quarter period of the intermediate-frequency carrier oscillation, and for supplying a second output signal, a first filter stage for low-pass filtering the first output signal and for supplying a third output signal, a multiplier stage for multiplicatively combining the second output signal and the third output signal to form a fourth output signal, a superposition stage for forming a seventh output signal by additively combining a fifth output signal and a sixth output signal derived from the second output signal and the fourth output signal, and a second filter stage for deriving a control signal from the seventh output signal for controlling the frequency and/or phase of the controllable oscillator. To ensure a reliable operation, also upon overmodulation, this circuit includes a first coefficient member for deriving the fifth output signal from the second output signal, and a second coefficient member for deriving the sixth output signal from the fourth output signal, the signal applied to each coefficient member being multiplied by a predeterminable coefficient (k1, k2) for forming the signal derived therefrom, wherein the coefficient (k1) of the first coefficient member being chosen is larger than the coefficient (k2) of the second coefficient member.

REFERENCES:
patent: 4091410 (1978-05-01), Ciha
patent: 4633315 (1986-12-01), Kasperkovitz
patent: 5105273 (1992-04-01), Hyakutake
patent: 5122879 (1992-06-01), Ito
patent: 5235422 (1993-08-01), Ido et al.
"An Advanced 5V Vif-/SiF PLL for Signal Detection in TV Sets and VTRs" published in IEEE Trans, Cons. 1991, vol. 37, No. 4.
Discourse No. 23 by O. Hermsdorfer, "Der Synchrongleichrichter im Nyauist Messdemoulator--Aufereitung des Schalttragers and Auswirkungen von Phasenstorhub auf das demodulierte Signal"--FKTG conf. Oct. 4-Oct. 7, 1976.

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