Circuit arrangement for converting ECL-logic signals to TTL-logi

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307455, 307247R, 307264, 323316, H03K 19092, H03K 19086, H03K 19013, H03K 1704

Patent

active

046299130

ABSTRACT:
A circuit arrangement for level conversion of ECL-logic levels to TTL-logic levels, having an emitter-coupled current switch with an input addressable by ECL-logic levels, and a TTL-logic output stage, includes a voltage-controlled current source having an input addressable by an output of the current switch, and having an output connected to the TTL-logic output stage.

REFERENCES:
patent: 3491251 (1970-01-01), Witsell
patent: 3676707 (1972-07-01), Conrad et al.
patent: 3766406 (1973-10-01), Bryant et al.
patent: 4356409 (1982-10-01), Masuda et al.
patent: 4456838 (1984-06-01), Taguchi et al.
patent: 4533838 (1985-08-01), Fujita
patent: 4539493 (1985-09-01), Varadarajan
Integrated Circuits Catalog for Design Engineers, 1st Edition, Texas Instruments, 1971, pp. 4-73 to 4-84.
Motorola MECL Integrated Circuits, 1978, p. 3-19 prepared by Technical Information Center.
U. Tietz and Ch. Schenk, Halbleiter-Schaltungstechnik (Semiconductor Circuit Technology), 5th Edition, Springer-Verlag, Berlin-Heidelberg-New York, 1980, pp. 153-154.

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