Circuit arrangement for controlling the load current in a power

Details Circuit arrangement for controlling the load current in a power Circuit arrangement for controlling the load current in a power

1989-11-15

1990-08-28

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307270, 3072965, 307450, 307300, H03K 1708, H03K 1716, H03K 17687/19/094

Patent

active

049528270

ABSTRACT:
A circuit arrangement for controlling load current of a power MOSFET wherein the load is connected at the source terminal includes a second FET having a defined threshold voltage connected with its drain-source path inserted between the gate and source of the power MOSFET. A third FET connects the gate terminal of the second FET to the drain voltage of the power MOSFET when the power MOSFET is in the conductive condition. When the drain-source voltage of the power MOSFET becomes higher than the threshold voltage of the second FET, the second FET becomes conductive and drives the gate-source voltage of the power MOSFET down.

REFERENCES:
patent: 4275313 (1981-06-01), Boll et al.
patent: 4451748 (1984-05-01), Amrany
patent: 4477742 (1984-10-01), Janutka
patent: 4580070 (1986-04-01), Westman
patent: 4675561 (1987-06-01), Bowers
patent: 4678950 (1987-07-01), Mitake
patent: 4801822 (1989-01-01), Idaka
patent: 4894568 (1990-01-01), Paulin
C. R. Hoffman, Constant-Current Source for MOSFET Circuits, p. 2391, vol. 17, No. 8, Jan. 1975.
Article by T. Jones, "Choose the Right F.E.T.", p. 299. Wireless World, Aug., 1974, vol. 30.

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