Circuit arrangement for compensating phase differences of non-sy

Details Circuit arrangement for compensating phase differences of non-sy Circuit arrangement for compensating phase differences of non-sy

1980-09-08

1983-02-01

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

375106, H04J 306, H04L 704

Patent

active

043719627

ABSTRACT:
A pulse coded time division multiplex (PCM) telecommunication system has two non-synchronous clock pulse trains for controlling information transfer and switching operations, respectively. In a circuit arrangement for compensating phase differences resulting from deviations between both clock pulse trains there is arranged an intermediate store for externally controlled buffering of PCM words for half of a pulse frame and connected thereto a buffer store for internally controlled buffering of PCM words for a full pulse frame. The intermediate store is designed for two modes of operation under control of the external clock pulse train. In an active mode during one cycle at first a stored PCM word is read out and is then replaced by a new PCM word. In the second mode the same PCM word first is temporarily buffered and immediately read out thereafter. Change of operation is controlled by a control unit monitoring addresses for alternate read operations and write operations of the buffer store of a minimum off-set of selected addresses to obtain by skipping of half of a pulse frame sufficient off-set without continuous uncontrolled slippage losses.

REFERENCES:
patent: 4158107 (1979-06-01), Nicholas
patent: 4290135 (1981-09-01), Zemanek

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