Circuit arrangement for clock pulse recovery at the receiving en

Pulse or digital communications – Spread spectrum – Direct sequence

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340347DA, 375118, H04L 702

Patent

active

043618979

ABSTRACT:
A circuit arrangement for clock pulse recovery on the receiving side of a digital clock-controlled data system is particularly characterized in that in the receiver a branch circuit is connected to the input side in parallel with a digital converter for converting the digital data signal, the branch circuit comprising an EXCLUSIVE or gate having two inputs and a delay element in the feed to one input of a digital counter which is connected to the output of the EXCLUSIVE OR gate and actuated by a quartz-stabilized oscillator having a frequency of multiple of the desired timing frequency and whose output is connected to the digital converter.

REFERENCES:
patent: 3705398 (1972-12-01), Kostenbauer et al.
patent: 4208724 (1980-06-01), Rottlingound
patent: 4227251 (1980-10-01), Kazama et al.
patent: 4230903 (1980-10-01), Fukuda et al.
patent: 4232388 (1980-11-01), Isailovie
patent: 4267595 (1981-05-01), Hernandez

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