Circuit arrangement for clamping black level reference signals c

Details Circuit arrangement for clamping black level reference signals c Circuit arrangement for clamping black level reference signals c

1989-09-29

1990-12-25

Britton, Howard W.

Facsimile and static presentation processing

Facsimile

Recording apparatus

35821315, 35821318, 358221, 358171, H04N 516, H04N 314

Patent

active

049807684

ABSTRACT:
A circuit arrangement is provided for clamping the black reference signals contained in a video signal sequence of an optical line scanner comprising a CCD sensor, using a video amplifier and a following analog-to-digital converter, and a memory controlled by the black reference signal for the control criterion that influences the video amplifier. A NOR gate is connected to all of the outputs of the analog-to-digital converter and the output of the NOR gate is connected to an input of a D flip-flop which is clocked by the black reference signal, and an integrator is connected to the output of the D flip-flop by way of a network and symmetrically driven with reference to its input voltage so that the output voltage of the integrator which decreases or increases in a ramp-like manner is added to the signal voltage of the line scanner at the input of the video amplifier.

REFERENCES:
patent: 4553169 (1985-11-01), Yoshioka et al.
patent: 4742392 (1988-05-01), Hashimoto
patent: 4816917 (1989-03-01), Yamamoto et al.
patent: 4915929 (1983-11-01), Yoshisato
Eto et al., "Digital Processing Amplifier and Color Encoder", SMPTE Journal, Jan. 1978, vol. 87, pp. 15-19.

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