Circuit arrangement for automatically decreasing the load curren

Details Circuit arrangement for automatically decreasing the load curren Circuit arrangement for automatically decreasing the load curren

1995-05-17

1997-04-08

Wong, Peter S.

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

323265, 323274, 323280, 323281, G05F 500

Patent

active

056191260

DESCRIPTION:

BRIEF SUMMARY
This invention relate to a circuit arrangement for automatically decreasing the load current, comprising a series arrangement formed by a load and a first electronic switching device and connected to a DC source of power, the first switching device being driven by a driver, and further comprising a control circuit controlling the driver.
In prior German patent application P 41 31 981.8 a battery-powered appliance is described having an electrical load powered by the battery through an electronic switching device, and a display means for indicating the charge status of the battery. In the use of a direct-current motor as the load as, for example, in a rechargeable electric shaver, a pulse duration modulator operates to reduce the rotational frequency of the motor down to "zero" value when the charge-status indicator reaches "zero" value or when the battery voltage falls below a specified value. In this arrangement, accordingly, the load current is decreased from outside by a pulse duration modulator. Such a load current decreasing arrangement may be used, for example, for protecting the battery (the accumulator.) from deep discharges.
It is an object of the present invention to provide a simple and economical circuit arrangement for decreasing the load current automatically.
This object is accomplished in that in a circuit arrangement of the type initially described the control circuit is adapted to be initiated by means of a second electronic switching device, so that this second electronic switching device connects the first terminal of a capacitor and of a first resistor as well as the base of a transistor to the one pole of the DC source of power, with the main current path of the transistor being between the input of the driver and the other pole of the DC source, that the second terminal of the capacitor and of the first resistor is coupled to the other pole of the DC source, and that the end of the first electronic switching device connected to the load is coupled to the second terminal of the capacitor through a feedback resistor.
Advantageous embodiments will become apparent from the subclaims and the description.
An embodiment of the present invention will be described in more detail in the following with reference to the accompanying drawing.
FIG. 1 is a circuit arrangement for automatically decreasing load current.
The load 2 may be any electrical energy-absorbing device as, for example, a direct-current motor, being symbolically represented in the drawing by the load resistance RL. Connected in series with the load 2 is the parallel arrangement comprised of the two transistors T1 and T2 forming the first electronic switching device 1, with the collectors of the two transistors being connected to the load 2 (node C), while the emitters are coupled to reference potential. A DC voltage U may be applied to this series arrangement by means of a switch S1, with the positive pole of the voltage source residing at the load while the negative pole, representing reference potential in this embodiment, is present at the emitters of the transistors T1 and T2. The DC source 5 of power U may be, for example, the battery or the accumulator of a small electrical appliance as an electric shaver, for driving a direct-current motor providing the load 2. The bases of the transistors T1 and T2 are connected, through base resistors R5 and R3, respectively, to the collector of a transistor T4 forming the driver (node B). Further, the collector of the transistor T4 (node B) is connected to reference potential through a resistor R7, its emitter being coupled to the positive pole of the voltage source U. The base of the transistor T4 is connected to a voltage divider formed by resistors R1 and R2, with the resistor R1 being connected to the positive pole of the voltage source U, while the resistor R2 is connected to the collector of a transistor T3 forming part of the control circuit 4. The emitter of the transistor T3 is connected to reference potential.
Through a base resistor R9, the base of the transistor T3 is conn

REFERENCES:
patent: 4001668 (1977-01-01), Lewis

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