Circuit arrangement for a timed power supply

Details Circuit arrangement for a timed power supply Circuit arrangement for a timed power supply

2000-04-14

2001-10-30

Wong, Peter S. (Department: 2838)

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

Reexamination Certificate

active

06310468

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a circuit arrangement for a timed power supply having an integrated circuit that is connected to first and second supply potential terminals and that comprises a switching mechanism, a control circuit that controls the switching mechanism, and a diode. A coil is also provided, which is connected to the switching mechanism and to a first output terminal. A load is connected between the first and second output terminals and a charge storing device is connected in parallel with the load.
Circuit arrangements for timed switched-mode regulators are taught in a wide variety of configurations. For example, the principal mode of functioning and constructing and operating secondarily timed switched-mode regulators and primarily timed switched-mode regulators is detailed in the book Halbleiterschaltungstechnik (Tietze, U. and Schenk, Ch.; 10
th
, ed,1993, Springer:561-576). Besides down converters and up converters, secondarily timed switched-mode regulators also include inverting converters. The advantage of these switched-mode regulators is that a separate transformer is not required, but rather only a storage choke. In the simplest case, secondarily timed switched-mode regulators consist of three components only; namely, a switching transistor, the aforementioned storage choke, and a smoothing capacitor. The switching transistor is constructed as a two-way switch. The two-way switch can be eliminated, however, by including a simple on-off switch in one branch of a down converter and providing a diode in the other branch.
A variety of integrated circuits are known for realizing these types of switched-mode regulators. In the above cited book, on page 567, an integrated module L296 from SGS is described, which internally comprises the series circuit of a bipolar transistor and a freewheeling diode as well as a control circuit for switching the switching transistor on and off.
Down converters, also known as step-down regulators, are used primarily where a low supply voltage must be generated from a high supply voltage with a high degree of effectiveness. In particular, it is noted that a high degree of effectiveness is important above all other considerations in battery-operated devices, for example. Besides achieving a high degree of effectiveness, the heating of electronic components by dissipated power is also of primary importance. This is the case particularly in automotive electronics applications. Despite a high degree of effectiveness, timed power supplies have not previously been applied in automotive electronics due to the lack of electromagnetic compatibility. Instead, linear regulators have been used to generate a regulated supply voltage, though these heat up intensely in operation.
Linear regulators are typically operated in automotive electronics with a nominal current of 400 mA. At a lateral bipolar transistor, the difference between the input voltage and the output voltage drops. The product of the difference between the input and the output voltages and the nominal current is converted into heat loss. The larger the voltage difference between the input and output of the bipolar transistor, the higher the losses. Therefore, due to the sharply rising power loss, it is inappropriate to use a linear regulator in a 42-volt vehicle network. It is therefore desirable to use a switched-mode regulator for load currents of approximately 1 A.
As mentioned above, for reasons of electromagnetic compatibility (EMC), switched-mode regulators have not been used in the automotive field. One possibility for realizing a low EMC radiation is to select a very low timing frequency of the power supply (i.e., in the range from 10 to 40 kHz) and to switch the switching transistor slowly. In this way, the power loss generated by the switching losses can be limited. On the other hand, however, the use of large storage chokes and smoothing capacitors would then be necessary, which are very costly in terms of space and money.
Thus, another possible solution is to use resonance converters, which, with additional resonant circuit elements (coils and capacitors) and diodes, would make possible an approximately sinusoidal voltage and current characteristic. However, resonance converters load the constituent components with higher currents or voltages and also require a significantly higher number of components. Furthermore, the control range with respect to load oscillations and input voltage oscillations is limited.
SUMMARY OF THE INVENTION
The present invention is, thus, advantageous by providing a circuit arrangement for a timed power supply that satisfies the requirements in terms of electromagnetic compatibility, on the one hand, and only generates a small amount of power loss, on the other hand.
This and other advantages are inventively achieved with a circuit arrangement having first and second supply potential terminals and first and second output terminals. Additionally, a circuit arrangement includes a first charge storage unit and an integrated circuit connected to the first and second supply potential terminals. The integrated circuit has a switching mechanism comprised of a first semiconductor switch and a second semiconductor switch, a control circuit that controls the switching mechanism and a diode. An end of a coil is connected to the switching mechanism and the other end of the coil is connected to the first output terminal. Finally, a load is connected between the first output terminal and the second output terminal and is also connected in parallel with the first charge storage unit. With this arrangement, it is thus possible to generate slow switching edges, even given high clock frequencies, thereby minimizing the heating of the semiconductor switch.
An important consideration of the present invention is that electromagnetic radiation is caused predominantly by short current rise times of the switching processes, whereas steep voltage rises given a constant current are of secondary importance for electromagnetic compatibility. However, available timed power supplies generate slow voltage edges and fast current transitions, which cannot satisfy the requirements of EMC. The generation of a slow current transition and a relatively fast voltage edge is made possible with the switching mechanism of the present invention, which includes a first and a second semiconductor switch.
The first and second semiconductor switches of the present invention are advantageously connected with their load paths in parallel and are controlled by the control unit separately. The semiconductor switches are designed such that, given the same inception voltage, the first semiconductor switch is capable of carrying a larger current than the second semiconductor switch. The first semiconductor switch features a low activation resistance, which, in conjunction with its gate-drain capacity, guarantees a sufficiently high steepness of the voltage edges. The second semiconductor switch is selected such that its drain saturation current is exactly enough to accept the entire load current. To activate, the gate-source voltage is slowly increased from a value below the inception voltage to its maximum value with a definite edge steepness. To deactivate, the gate-source voltage is reduced again with a comparable edge steepness. The desired slow edge steepness of the current can be adjusted very easily at the second semiconductor switch, which has a small surface area and thus a small input capacity. This results in the requisite low rate of current rise and, thus, low electromagnetic radiation.
By providing two semiconductor switches in the switching mechanism, the current rise rate and the voltage rise rate may be selected independently of one another. The two semiconductor switches are advantageously controlled such that the second semiconductor switch is switched on before the first semiconductor switch. It is also advantageous when the second semiconductor switch is turned off after the first semiconductor switch. The result of this is that the load

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